Programming

Reference

Manual

KENBAK-1

Computer

KENBAK

P.O.BOX 49324

LOS ANGELES, CA. 90049

CONTROL INPUT -ADDRESS--MEMORY--RUN--ON CLEAR DISPLAY SET READ STORE START STOP POWER KENBAK-1

frontispiece

Preface

This manual is a summary of the KENBAK-1 computer programming characteristics. The reader is assumed to be acquainted with the general theory of digital computers. Other manuals published by KENBAK have as their subjects the general theory of computers, programming of the KENBAK-1, and the maintenance and theory of operation of the KENBAK-1.

To correct errors or to clarify the presentation, revised pages will be issued from time to time. The list of current pages should be retained as it indicates the status of the manual. Pages are punched for a three ring binder so that the user may keep all of his material in one place with easy accessibility.

Questions and comments are welcomed since that provides the feedback which tells how well the job is being done.

Price: $2.00

Programming Reference Manual KENBAK-1 Computer

List of Current Pages, Revision 0

Errata

For which no revised page was issued

NONE

Programming Reference Manual KENBAK-1 Computer

Table of Contents

Introduction
PR-1
Memory Structure and Addressing
PR-1
Special Memory Locations
PR-1
Number Representations
PR-3
Addressing Modes
PR-4
Instructions
ADD and SUB
PR-5
LOAD and STORE
PR-6
AND and OR
PR-7
LNEG
JUMPS (BRANCHES)
PR-8
SKIPS
PR-9
SET BITS
PR-10
SHIFTS and ROTATES
PR-11
NOOP and HALT
PR-12
Symbolic Representation of Instructions
PR-14
Register-to-Register Operations
PR-15
Table Look Up
PR-16
Relative Operand Addressing
PR-16
Input and Output
PR-17
Console Operations
PR-18
Power On-Off Switch
PR-18
Console Data Lamps
PR-18
Console Data Pushbuttons and Clear
PR-20
Address Control Lamp, Address Display and Set Pushbuttons
PR-20
Memory Control Lamp, Memory Read and Store Pushbuttons
PR-21
Start and Stop Pushbuttons
PR-21
Lamp Tests
PR-22
Example of Console Use
PR-23
Summary of Instruction Coding
PR-24

INTRODUCTION

The KENBAK-1 is a serial stored program general purpose digital computer with a memory of 256 eight bit bytes. Internally the machine is binary two's complement. Halt, No-op, and Shift instructions require one byte. All other instructions require two bytes which may start on either an odd or even address.

MEMORY STRUCTURE AND ADDRESSING

Each of the 256 bytes of memory is addressable. The octal range of their addresses is 000 to 377 (decimal 000 to 255). Since $ 2^{8} $ is equal to 256, one byte of memory can hold a complete address. The eight bits of a byte are always identified as:

where the most significant bit is b7 and the least significant bit is b0.

Octal group 100 never assumes a value larger than 3.

SPECIAL MEMORY LOCATIONS

Nine memory locations are used for special purposes. They may be addressed and used as an operand location though the programmer must be aware that he may be interfering with the assigned special function. The special locations are:

The A Register is the primary register of the arithmetic unit. Operations that can be performed with it include Load, Store, Add, Subtract, And, Or, Load Complement, Shifts and Rotates. The B Register is the secondary register of the arithmetic unit. Operations that can be performed with it include Load, Store, Add, Subtract, Shifts, and Rotates. The contents of the X Register are used in the Indexed address mode. Operations that can be performed with it include Load, Store, Add, Subtract. When not being used in Indexed addressing, the X Register can be used as an arithmetic register.

The A, B, and X Registers can all be used (singly, not jointly) to control the branch conditions. The testable conditions include Non-zero, Zero, Less than Zero, Positive (including zero), and Positive Non-zero.

The P Register is the Program Counter which shows the address of the next instruction to be executed.

The Output Register, location 200, controls the Console Data Lamps when the computer is in the Run state.

Locations 201, 202, and 203 contain the Overflow (OF) and Carry (CA) bits for the A, B, and X Registers, respectively.

$$ \begin{array}{l}b7\ b6\ b5\ b4\ b3\ b2\ b1\ b0\0\ 0\ 0\ 0\ 0\ 0\ CA\ OF\end{array} $$

Each time that an Add or Subtract instruction is performed, the Overflow and Carry bits for the register are updated. They remain in this state until the next Add or Subtract operation to that register occurs. The remaining six bits in each word are always set to zero when the Overflow and Carry are updated. The Load Complement and the Shift instructions do not alter these words, nor do any other instructions.

Location 377 is the input location. Data from the Console Data Pushbuttons is placed here in both the Run and Halt states of the computer.

NUMBER